1. Field of the Invention
The present invention relates to a display device, and more particularly, to a liquid crystal display and a manufacturing method of the same.
2. Description of the Related Art
There are various pixel design methods for a TFT-LCD (Thin Film Transistor-Liquid Crystal Display). A designer must select between an amorphous-silicon TFT (a-Si:H TFT) and a Polycrystalline silicon TFT, and then, must select either a Back Channel Etched (BCE) TFT structure, a Channel Passivated (CHP) TFT structure and other TFT structures. After that, the designer must map out a TFT arrangement plan and a design of a pixel electrode and determine a storage capacitance (hereinafter, called Cst) type.
The Cst type is classified into a storage-on-common method and a storage-on-gate method according to methods for manufacturing a common electrode. In the storage-on-common method, the common electrode of the Cst is made separately, but in the storage-on-gate method, a portion of a gate wiring of a front end is used as the common electrode of the Cst. Compared with the storage on common method, the TFT-LCD of the storage-on-gate method, which does not have the separate wiring for the Cst, has a larger aperture ratio and there is no overlapped portion between data lines and the Cst wiring, and thereby opens in the data lines are reduced and the recovery rate is increased. However, because the Cst which is formed on the gate wiring makes a signal delay of the gate line, the gate wiring must be made of low resistance metal, such as aluminum (Al) or aluminum alloy (Al alloy). Moreover, based on an electric charge of a pixel, because it is not a perfect dot inversion or column inversion, picture quality is relatively lowered.
Hereinafter, referring to the drawings, a conventional liquid crystal display will be described in detail.
FIG. 1 is a plan view showing a unit pixel area of a TFT-LCD of the storage on gate type.
As shown in FIG. 1, two data lines 11 are aligned parallel to each other, and two scanning lines or gate lines 12 are aligned parallel to each other in a perpendicular direction to the data lines. Furthermore, TFTs, including source/drain electrodes 13 and 14 and a gate line 15, is formed at intersections of the data lines 11 and the gate lines 12. At the center portion of the pixel area is formed a pixel electrode 16 electrically connected with the drain electrode 14. A Cst 17 is formed on an upper end of the pixel area using a portion of the gate wiring as an electrode. The Cst 17 helps to charge a signal voltage.
FIG. 2 is a plan view of the conventional liquid crystal display.
In general, liquid crystal display panel includes a plurality of scanning lines or gate lines 21 (GØ-Gn) aligned in one direction and in regular intervals, a plurality of data lines 22 (D1-Dn) aligned in a perpendicular direction to the gate lines and in regular intervals, a plurality of pixel electrodes (not shown) defined by the gate lines and the data lines, and a plurality of switching devices such as TFTs (not shown) switched by signals of the gate lines and applying data signals supplied through the data lines to the pixel electrodes.
Furthermore, driver ICs 23 and 24 for supplying gate driving signals and data signals are attached to a portion of the gate lines and the data lines. That is, a pad is formed at ends of the gate lines and the data lines, where the driving drive ICs will be connected.
FIG. 3 is a sectional view along line I-I′ of FIG. 2.
First, in a TFT substrate, which is a lower substrate, a gate insulating film 32 is piled up on an insulating substrate 31. First and second data lines 33 and 34 are patterned on the gate insulating film 32. A passivation layer 35 of insulated material, is formed on the substrate including the data lines. Moreover, a pixel electrode 36 is patterned on the passivation layer 35 corresponding between the first and second data lines 33 and 34. A color filter substrate, which is an upper substrate, includes black matrixes 38 formed in regular intervals and a color filter layer 39 formed in a space between the black matrixes 38.
However, the conventional liquid crystal display and the manufacturing methods thereof have the following problems.
The final voltage applied to a pixel is fixed after a coupling phenomenon acts on it by the gate signal. That is, the difference between Vgh and Vgl is the size of a voltage applied to pixel. However, in the case of the number Ø gate line (the first gate line, GØ) (see FIG. 2), because only the Vgl signal of the Vgh and Vgl signals, is applied there occurs a difference between the voltage applied to those pixels and the voltage applied to the pixels of another gate line, and thereby a light phenomenon occurs to pixels controlled by the number 1 gate line (G1).
Generally, as a counter measure of such a light phenomenon, there is a method to apply the same signal as a prescribed gate line to the number Ø gate line (GØ), but this requires an additional material cost.